Few transputer-based workstation systems were designed; the most notable likely being the Atari Transputer Workstation. The transputer was more successful in the field of massively parallel computing, where several vendors produced transputer-based systems in the late 1980s.
|
|
While Inmos and the transputer did not achieve this expectation, the transputer architecture was highly influential in provoking new ideas in computer architecture, several of which have re-emerged in different forms in modern systems.
|
|
T414 transputer chip IMSB008 base platform with IMSB419 and IMSB404 modules mounted The transputer is a series of pioneering microprocessors from the 1980s, featuring integrated memory and serial communication links, intended for parallel computing. They were designed and produced by Inmos, a semiconductor company based in Bristol, United Kingdom.Allen Kent, James G. Williams (eds.) (1998) "Encyclopedia of Computer Science and Technology", , "The Transputer Family of Products", by Hamid R. Arabnia. For some time in the late 1980s, many considered the transputer to be the next great design for the future of computing.
|
|
After a peek (which needed an address) or a poke (which took a word address, and a word of data: 16- or 32-bit depending on the basic word width of the transputer variant) the transputer would return to waiting for a bootstrap.
|
|
TPCORE is an implementation of the transputer, including the os-links, that runs in a FPGA. "Communicating Process Architectures 2004". p. 361. Makoto Tanaka; Naoya Fukuchi; Yutaka Ooki; and Chikara Fukunaga. "Design of a Transputer Core and its implementation in an FPGA". 2004\.
|
|
Empty B008 motherboard Selection of TRAMs To provide an easy means of prototyping, constructing and configuring multiple-transputer systems, Inmos introduced the TRAM (TRAnsputer Module) standard in 1987. A TRAM was essentially a building block daughterboard comprising a transputer and, optionally, external memory and/or peripheral devices, with simple standardised connectors providing power, transputer links, clock and system signals. Various sizes of TRAM were defined, from the basic Size 1 TRAM (3.66 in by 1.05 in) up to Size 8 (3.66 in by 8.75 in). Inmos produced a range of TRAM motherboards for various host buses such as Industry Standard Architecture (ISA), MicroChannel, or VMEbus.
|
|
The transputer achieved some success as the basis for several parallel supercomputers from companies such as Meiko (formed by ex-Inmos employees in 1985), Floating Point Systems, Parsytec and Parsys. It was used in a few workstations, the most notable probably being the Atari Transputer Workstation. Being a relatively self-contained design, it was also used in some embedded systems. However, the unconventional nature of the transputer and its native occam programming language limited its appeal.
|
|
The Sun acted as "front-end" host system for managing the transputers, running development tools and providing mass storage. A version of M²VCS running as a SunOS daemon called SVCS (Sun Virtual Computing Surfaces) provided access between the transputer network and the Sun host. As the performance of the transputer became less competitive towards the end of the 1980s (the follow-on T9000 transputer being beset with delays) Meiko added the ability to supplement the transputers with Intel i860 processors.
|
|
An advanced Unix-like distributed operating system, HeliOS, was also designed specifically for multi-transputer systems by Perihelion Software.
|
|
New York: Springer-Verlag. The Computing Surface architecture comprised multiple boards containing transputers connected together by their communications links via Meiko- designed link switch chips. A variety of different boards were produced with different transputer variants, RAM capacities and peripherals. The initial software environments provided for the Computing Surface was OPS (Occam Programming System), Meiko's version of INMOS's D700 Transputer Development System.
|
|
Tony Fuge, then a leading engineer at Inmos, was awarded the Prince Philip Designers Prize in 1987 for his work on the T414 transputer.
|
|
Meiko Scientific Ltd. was a British supercomputer company based in Bristol, founded by members of the design team working on the INMOS transputer microprocessor.
|
|
SuperCluster (picture) had a hierarchical, cluster-based design. A basic unit was a 16-transputer T800, fully connected cluster; larger systems had additional levels of NCUs to form necessary connections. The Network Configuration Manager (NCM) software controlled the NCUs and dynamically established the required Connections. Each transputer could be equipped with 1 to 32 MB of dynamicic RAM with single-error correction and double-error detection.
|
|
To speed up rendering, Pixar engineers did experiments with parallel rendering computers using Transputer chips called Pixar Image Computer. One engineer named Jeff Mock built a small version with a 2,5 × 5 inches/ 6,4 × 13 cm circuit board containing one Transputer that he could put in his pocket. During that time the Sony Walkman was very popular and Jeff Mock called his portable board Renderman.
|
|
This encountered various technical problems and delays, and was eventually abandoned, signalling the end of the development of the transputer as a parallel processing platform. However, transputer derivatives such as the ST20 were later incorporated into chipsets for embedded applications such as set-top boxes. In December 1994, Inmos was fully assimilated into STMicroelectronics, and the usage of the Inmos brand name was discontinued.
|
|
Transputers could boot from memory as do most computers, or over network links, so one transputer could start up a whole network. There was a pin called BootFromROM that, when asserted, caused the transputer to start two bytes from the top of memory (sufficient for up to a 256 byte backward jump, usually out of ROM). When this pin was not asserted, the first byte that arrived down any link was the length of a bootstrap to be downloaded, which was placed in low memory and run. The 'special' lengths of 0 and 1 were reserved for PEEK and POKE – allowing inspection and changing of RAM in an unbooted transputer.
|
|
The first production transputers, the T212 and T414, followed in 1985; the T800 floating point transputer in 1987. May initiated the design of one of the first VLSI packet switches, the C104, together with the communications system of the T9000 transputer. Working closely with Tony Hoare and the Programming Research Group at Oxford University, May introduced formal verification techniques into the design of the T800 floating point unit and the T9000 transputer. These were some of the earliest uses of formal verification in microprocessor design, involving specifications, correctness preserving transformations and model checking, giving rise to the initial version of the FDR checker developed at Oxford.
|
|
K. Bowden (1991) "Hierarchical Tearing: An Efficient Holographic Algorithm for System Decomposition", International Journal of General Systems 24(1), pp 23–38 When parallel computing was provided by the transputer, Keith Bowden described how diakoptics might be applied.K. Bowden (1990) "Kron's Method of Tearing on a Transputer Array", The Computer Journal 33(5):453–459 It is an ongoing open question how the parallelism of Quantum Computing may be relevant.
|
|
The same logical system was used to communicate between programs running on one transputer, implemented as virtual network links in memory. So programs asking for any input or output automatically paused while the operation completed, a task that normally required an operating system to handle as the arbiter of hardware. Operating systems on the transputer did not need to handle scheduling; the chip could be considered to have an OS inside it.
|
|
The links between nodes can be implemented using some standard network protocol (for example Ethernet), using bespoke network links (used in for example the Transputer), or using dual-ported memories.
|
|
Transputers were intended to be programmed using the programming language occam, based on the communicating sequential processes (CSP) process calculus. The transputer was built to run Occam specifically, more than contemporary CISC designs were built to run languages like Pascal or C. Occam supported concurrency and channel-based inter-process or inter-processor communication as a fundamental part of the language. With the parallelism and communications built into the chip and the language interacting with it directly, writing code for things like device controllers became a triviality; even the most basic code could watch the serial ports for I/O, and would automatically sleep when there was no data. The initial occam development environment for the transputer was the Inmos D700 Transputer Development System (TDS).
|
|
In 1986 Tim King...Later he became involved in parallel operating systems and novel architecture processors (remember the Transputer?)... Tim King left his job at MetaComCo, along with a few other employees, to start Perihelion Software in England. There they started development of a new parallel-processing operating system known as "HeliOS". At about the same time a colleague, Jack Lang, started Perihelion (later Perihelion Hardware) to create a new transputer based workstation that would run HeliOS.
|
|
This was an unorthodox integrated development environment incorporating an editor, compiler, linker and (post-mortem) debugger. The TDS was a transputer application written in occam. The TDS text editor was notable in that it was a folding editor, allowing blocks of code to be hidden and revealed, to make the structure of the code more apparent. Unfortunately, the combination of an unfamiliar programming language and equally unfamiliar development environment did nothing for the early popularity of the transputer.
|
|
The T805 was also later available as a 30 MHz part. An enhanced T810 was planned, which would have had more RAM, more and faster links, extra instructions, and improved microcode, but this was cancelled around 1990. Inmos also produced a variety of support chips for the transputer processors, such as the C004 32-way link switch and the C011 and C012 "link adapters" which allowed transputer links to be interfaced to an 8-bit data bus.
|
|
The paradigm was originally invented for parallel computers in the 1980s, especially computers built with transputer microprocessors by INMOS, or similar architectures. Occam was an early process-oriented language developed for the Transputer. Some derivations have evolved from the message passing paradigm of Occam to enable uniform efficiency when porting applications between distributed memory and shared memory parallel computers . The first such derived example appears in the programming language Ease designed at Yale University in 1990.
|
|
Atari Transputer Workstation is a standalone machine developed in conjunction with Perihelion Hardware, containing modified ST hardware and up to 17 transputers capable of massively parallel operations for tasks such as ray tracing.
|
|
Helios was predominantly intended to be used with Transputer systems. It is compatible with products from various manufacturers including INMOS' TRAM systems, the Meiko CS, Parsytec MultiCluster and SuperCluster, and the Telmat T.Node. The Atari Transputer Workstation was perhaps the highest profile Helios hardware, at least outside academia. Helios can run on T4xx and T8xx, 32-bit Transputers (but not the T2xx 16-bit models) and includes device drivers for various SCSI, Ethernet and graphics hardware from Inmos, Transtech, and others.
|
|
"An Interface Device to Support a Distributed Parallel System for the StrongARM Microprocessor". p. 1031. There were limits to the size of a system that could be built in this fashion. Since each transputer was linked to another in a fixed point-to-point layout, sending messages to a more distant transputer required that messages be relayed by each chip on the line. This introduced a delay with every "hop" over a link, leading to long delays on large nets.
|
|
These included Meiko Scientific (founded by ex- Inmos employees), Floating Point Systems, Parsytec, and Parsys. Several British academic institutions founded research activities in the application of transputer-based parallel systems, including Bristol Polytechnic's Bristol Transputer Centre and the University of Edinburgh's Edinburgh Concurrent Supercomputer Project. Also, the Data Acquisition and Second Level Trigger systems of the High Energy Physics ZEUS Experiment for the Hadron Elektron Ring Anlage (HERA) collider at DESY was based on a network of over 300 synchronously clocked transputers divided into several subsystems. These controlled both the readout of the custom detector electronics and ran reconstruction algorithms for physics event selection. The parallel processing abilities of the transputer were put to use commercially for image processing by the world's largest printing company, RR Donnelley & Sons, in the early 1990s.
|
|
Resulting from the more complex nodes, the software architecture used for coordinating the parallelism in such systems is typically far more heavyweight than in the transputer architecture. The fundamental transputer motive remains, yet was masked for over 20 years by the repeated doubling of transistor counts. Inevitably, microprocessor designers finally ran out of uses for the greater physical resources, almost at the same time when technology scaling began to hit its limits. Power consumption, and thus heat dissipation needs, render further clock rate increases unfeasible.
|
|
On top of adding components to the CPU die and placing multiple dies in one system, modern processors increasingly place multiple cores in one die. The transputer designers struggled to fit even one core into its transistor budget. Today designers, working with a 1000-fold increase in transistor densities, can now typically place many. One of the most recent commercial developments has emerged from the firm XMOS, which has developed a family of embedded multi-core multi-threaded processors which resonate strongly with the transputer and Inmos.
|
|
The internal clock actually had four non-overlapping phases and designers were free to use whichever combination of these they wanted, so it could be argued that the transputer actually ran at 80 MHz. Dynamic logic was used in many parts of the design to reduce area and increase speed. Unfortunately, these methods are difficult to combine with automatic test pattern generation scan testing so they fell out of favour for later designs. Prentice-Hall published a book on the general principles of the Transputer.
|
|
Ram Meenakshisundaram, "Ram's Totally Unofficial Atari Transputer Workstation 800 Pages"Atari Floods Comdex With Products, By Mark Stephens, 9 Nov 1987, InfoWorld, Page 5, ...a radical computing engine based on the Inmos T- 800 RISC processor. According to Atari president Sam Tramiel, the transputer- based Abaq requires a 4-mega- byte Atari Mega workstation front end to handle I/O... Two versions were shown at the time; one was a card that connected to the Mega ST bus expansion slot, the second version was a stand-alone tower system containing a miniaturized Mega ST inside."Abaq ATW Transputer 800", image shows the unreleased single-card solution The external card version was dropped at some point during development. It was later learned that the "Abaq" name was in use in Europe, so the product name was changed to ATW800.
|
|
This was based on the Transputer link protocol. Meiko developed its own switch silicon on and European Silicon Systems, ES2 Gate Array. This ASIC provided static connectivity and limited dynamic connectivity and was designed by Moray McLaren.
|
|
The transputer (the name deriving from "transistor" and "computer") was the first general purpose microprocessor designed specifically to be used in parallel computing systems. The goal was to produce a family of chips ranging in power and cost that could be wired together to form a complete parallel computer. The name was selected to indicate the role the individual transputers would play: numbers of them would be used as basic building blocks, just as transistors had earlier. Originally the plan was to make the transputer cost only a few dollars per unit.
|
|
Treated as a channel, a program could 'input' from the event channel, and proceed only after the event line was asserted. All transputers ran from an external 5 MHz clock input; this was multiplied to provide the processor clock. The transputer did not include a memory management unit (MMU) or a virtual memory system. Transputer variants (except the cancelled T9000) can be categorised into three groups: the 16-bit T2 series, the 32-bit T4 series, and the 32-bit T8 series with 64-bit IEEE 754 floating-point support.
|
|
This early work brought him into contact with Tony Hoare and Iann Barron: one of the founders of Inmos. When Inmos was formed in 1978, May joined to work on microcomputer architecture, becoming lead architect of the transputer and designer of the associated programming language Occam. This extended his earlier work and was also influenced by Tony Hoare, who was at the time working on CSP and acting as a consultant to Inmos. The prototype of the transputer was called the Simple 42 and was completed in 1982.
|
|
The first version of the HNeT Application Development System was released in 1990 and published in 1991Sutherland, J.G. (1991), "A transputer based implementation of holographic neural technology" Proceedings of the world transputer user group (WOTUG) conference on Transputing '91, pp. 657 – 675. which contained a number of example applications, based on the complex valued phase coherence/decoherence process. Among these applications were the complex valued Hopfield network or complex associative memory, which was discovered by S. JankowskiJankowski, Lozowski, A., and Zurada, J. M. (1996), "Complex-valued multistate neural associative memory," IEEE Trans.
|
|
In International Symposium on Parallel Symbolic Computation, p. 46. 1994. However, this kind of parallelism is difficult to manageMcBurney, D. L., and M. Ronan Sleep. "Transputer-based experiments with the ZAPP architecture." PARLE Parallel Architectures and Languages Europe.
|
|
Helios is a discontinued Unix-like operating system for parallel computers. It was developed and published by Perihelion Software. Its primary architecture is the Transputer. Helios' microkernel implements a distributed namespace and messaging protocol, through which services are accessed.
|
|
It appears they later lost interest in it. Atari Corp. met with Perihelion and work began on what would eventually become the Atari Transputer Workstation. The machine was first introduced at the November 1987 COMDEX with the name Abaq.
|
|
Perihelion Software Limited was a United Kingdom company founded in 1986 by Dr. Tim King along with a number of colleagues who had all worked together at MetaComCo on AmigaOS and written compilers for both the Amiga and the Atari ST. Perihelion Software produced an operating system for the INMOS Transputer called HeliOS. This was a system that looked like Unix but which could pass messages to processes running on either the same processor or another one. This was used in the Atari Transputer Workstation, among other places. Later HeliOS was ported to other processors including the ARM architecture.
|
|
In 1985, when INMOS management suggested the release of the transputer be delayed, Miles Chesney, David Alden, Eric Barton, Roy Bottomley, James Cownie and Gerry Talbot resigned and formed Meiko (Japanese for "well-engineered") to start work on massively parallel machines based on the processor. Nine weeks later they demonstrated a transputer system based on experimental 16 bit transputers at the SIGGRAPH in San Francisco in July 1985. In 1986 a system based on 32 bit T414 transputers was launched as the Meiko Computing Surface. By 1990, Meiko had sold more than 300 systems and grown to 125 employees.
|
|
MeikOS (also written as Meikos or MEiKOS) is a Unix-like transputer operating system developed for the Computing Surface during the late 1980s. MeikOS was derived from an early version of MINIX, extensively modified for the Computing Surface architecture. Unlike HeliOS, another Unix-like transputer operating system, MeikOS is essentially a single-processor operating system with a distributed filesystem. MeikOS was intended for use with the M²VCS (Meiko Multiple Virtual Computing Surfaces) resource management software, which partitions the processors of a Computing Surface into domains, manages user access to these domains, and provides inter-domain communication.
|
|
There is an emerging class of multicore/manycore processors taking the approach of a network on a chip (NoC), such as the Cell processor, Adapteva Epiphany architecture, Tilera, etc. The transputer and Inmos helped establish Bristol, UK, as a hub for microelectronic design and innovation.
|
|
MINIX 1.5, released in 1991, included support for MicroChannel IBM PS/2 systems and was also ported to the Motorola 68000 and SPARC architectures, supporting the Atari ST, Commodore Amiga, Apple Macintosh and Sun SPARCstation computer platforms. There were also unofficial ports to Intel 386 PC compatibles (in 32-bit protected mode), National Semiconductor NS32532, ARM and Inmos transputer processors. Meiko Scientific used an early version of MINIX as the basis for the MeikOS operating system for its transputer-based Computing Surface parallel computers. A version of MINIX running as a user process under SunOS and Solaris was also available, a simulator named SMX.
|
|
Thus, some call it a "GC-0.25".x'plorer Article at GeekDot.com The POWERx'plorer was based on 8 processing units arranged in a 2D mesh. Each processing unit had # one 80 MHz MPC 601 processor, # 8 MB of local memory and # a transputer for establishing and maintaining communication links.
|
|
Added circuitry scheduled traffic over the links. Processes waiting for communications would automatically pause while the networking circuitry finished its reads or writes. Other processes running on the transputer would then be given that processing time. It included two priority levels to improve real-time and multiprocessor operation.
|
|
MacIdris ran as an application under the Finder or Multifinder.MacWorld November 1989, page 18 quoted in comp.sys.mac After Whitesmiths had been merged with Intermetrics, Idris along with its development toolchain was ported by Real Time Systems Ltd to the INMOS T800 transputer architecture for the Parsytec SN1000 multiprocessor.
|
|
The Atari Transputer Workstation system consists of three main parts: # the main motherboard containing a T800-20 transputer and 4MB of RAM (expandable to 16MB) # a complete miniaturized Mega ST acting as an I/O processor with 512kB of RAM # the Blossom video system with 1MB of dual-ported RAM All of these are connected using the Transputer's 20 Mbit/s processor links. The motherboard contains three slots for additional "farm cards" containing four transputers each, meaning that a fully expanded ATW contains 13 transputers. Each runs at 20 MHz (the -20 in the name) which supplied about 10 MIPS each. The bus is available externally, allowing several ATWs to be connected into one large farm.
|
|
The Meiko Computing Surface (sometimes retrospectively referred to as the CS-1) was a massively parallel supercomputer. The system was based on the INMOS transputer microprocessor, later also using SPARC and Intel i860 processors.Computing Surface Brochure Meiko; 1989Arthur Trew and Greg Wilson (eds.) (1991). Past, Present, Parallel: A Survey of Available Parallel Computing Systems.
|
|
A POSIX compatibility library enables the use of Unix application software, and the system provides most of the usual Unix utilities. Work on Helios began in the autumn of 1986. Its success was limited by the commercial failure of the Transputer, and efforts to move to other architectures met with limited success. Perihelion ceased trading in 1998.
|
|
The motherboard includes a separate slot for one of the INMOS crossbar switches to improve inter-chip networking performance. HeliOS is Unix-like, but not Unix. It lacks memory protection, due largely to the lack of an MMU on the transputer. This is not a major issue, as the Transputer's stack-based architecture makes an MMU less important.
|
|
155 In total, Inmos had received £211 million from the government, but did not become profitable.Kevin Smith, "Inmos Forced to Get off the Dole." Electronics 22 September 1983, 56:106, as cited by Wayne Sandholtz In April 1989, Inmos was sold to SGS-Thomson (now STMicroelectronics). Around the same time, work was started on an enhanced transputer, the T9000.
|
|
XMOS was founded in July 2005 by Ali Dixon, James Foster, Noel Hurley, David May, and Hitesh Mehta. It received seed funding from the University of Bristol enterprise fund, and Wyvern seed fund. The name XMOS is a loose reference to Inmos. Some concepts found in XMOS technology (such as channels and threads) are part of the Transputer legacy.
|
|
The Atari Transputer Workstation (also known as ATW-800, or simply ATW) is a workstation class computer released by Atari Corporation in the late 1980s, based on the INMOS transputer. It was introduced in 1987 as the Abaq, but the name was changed before sales began.Atari to Display TransputerBased Workstation at Comdex, By Tom Moran, 12 Oct 1987, InfoWorld, Page 6News:CPU Design:RISC Chips Promise Performance Boot, By Scott Mace, 8 Feb 1988, InfoWorld, Page 81, ...Atari's Abaq computer is based on the Inmos T0800 RISC chip...Parallel thinking for powerful chip, By David Hebditch and Nick Anning, 28 Apr 1988, New Scientist, Page 54, ...The basic Abaq will cost between $4000 and $5000... Sales were almost non-existent, and the product was canceled after only a few hundred units had been produced.
|
|
He spent 1978 as a visiting fellow at Massachusetts Institute of Technology. For 1981 he returned to Caltech as a visiting research professor. There he learned of Carver Mead's work on very- large-scale integration and become interested in applying parallel computing techniques to large-scale scientific simulations. Hey worked with British semiconductor company Inmos on the Transputer project in the 1980s.
|
|
The STEbus was very successful in its day. It was given the official standard IEEE1000-1987. Many processors were available on STEbus cards, across a range of price and performance. These boards included the Intel 8031, 8085, 8088, 80188; the National Semiconductor 32008 and 32016; the Motorola 6809, 68000, and 68008; The Zilog Z80 and Z280; the Hitachi HD64180; and the Inmos Transputer.
|
|
Michael David May FRS FREng (born 24 February 1951) is a British computer scientist. He is a Professor in the Department of Computer Science at the University of Bristol and founder of XMOS Semiconductor, serving until February 2014 as the chief technology officer. May was lead architect for the transputer. As of 2017, he holds 56 patents, all in microprocessors and multi- processing.
|
|
During the late 1980s, the transputer (even in its later T800 form) also struggled to keep up with the ever-increasing performance of its competitors. Other devices produced by Inmos included the A100, A110 and A121 digital signal processors, G364 framebuffer, and a line of video RAMDACs, including the G171, which was adopted by IBM for the original VGA graphics adapter used in the IBM PS/2.
|
|
SVCS, or an improved version, called simply VCS was used to manage the transputer resources. Computing Surface configurations with multiple MK083 boards were also possible. A major drawback of the Computing Surface architecture was poor I/O bandwidth for general data shuffling. Although aggregate bandwidth for special case data shuffling could be very high, the general case has very poor performance relative to the compute bandwidth.
|
|
Founder Iann Barron left in 1971, following the collapse of a major customer. He went on to form Inmos and develop the transputer. He was replaced as Chairman by Tom Margerison, from London Weekend Television. During the 1970s CTL operated modestly successfully in a number of niche markets, while larger American competitors, such as Digital Equipment Corporation (DEC) with their PDP range, increased market share.
|
|
While the transputer was simple but powerful compared to many contemporary designs, it never came close to meeting its goal of being used universally in both CPU and microcontroller roles. In the microcontroller market, the market was dominated by 8-bit machines where cost was the most serious consideration. Here, even the T2s were too powerful and costly for most users. In the computer desktop and workstation field, the transputer was fairly fast (operating at about 10 million instructions per second (MIPS) at 20 MHz). This was excellent performance for the early 1980s, but by the time the floating- point unit (FPU) equipped T800 was shipping, other RISC designs had surpassed it. This could have been mitigated to a large extent if machines had used multiple transputers as planned, but T800s cost about $400 each when introduced, which meant a poor price/performance ratio.
|
|
The Transputer was a microprocessor developed to inexpensively implement parallel computation. IEEE 1355 resulted from an attempt to preserve the Transputer's unusually simple data network. This data strobe encoding scheme makes the links self-clocking, able to adapt automatically to different speeds. It was patented by Inmos under U.K. patent number 9011700.3, claim 16 (DS-Link bit-level encoding), and in 1991 under US patent 5341371, claim 16.
|
|
Growing internal parallelism has been one driving force behind improvements in conventional CPU designs. Instead of explicit thread-level parallelism (as is used in the transputer), CPU designs exploited implicit parallelism at the instruction-level, inspecting code sequences for data dependencies and issuing multiple independent instructions to different execution units. This is termed superscalar processing. Superscalar processors are suited for optimising the execution of sequentially constructed fragments of code.
|
|
These factors led the industry towards solutions little different in essence from those proposed by Inmos. The most powerful supercomputers in the world, based on designs from Columbia University and built as IBM Blue Gene, are real-world incarnations of the transputer dream. They are vast assemblies of identical, relatively low-performance SoCs. Recent trends have also tried to solve the transistor dilemma in ways that would have been too futuristic even for Inmos.
|
|
Although not strictly a transputer, the ST20 was heavily influenced by the T4 and T9 and formed the basis of the T450, which was arguably the last of the transputers. The mission of the ST20 was to be a reusable core in the then emerging SoC market. The original name of the ST20 was the Reusable Micro Core (RMC). The architecture was loosely based on the original T4 architecture with a microcode-controlled data path.
|
|
Various Inmos ICs Inmos' first products were static RAM devices, followed by dynamic RAMs and EEPROMs. Despite early production difficulties, Inmos eventually captured around 60% of the world SRAM market. However, Barron's long-term aim was to produce an innovative microprocessor architecture intended for parallel processing, the transputer. David May and Robert Milne were recruited to design this processor, which went into production in 1985 in the form of the T212 and T414 chips.
|
|
Therefore, a solution using Maze runner concepts was realized on an expansion board using the INMOS Transputer to boost the processing power. ColorCAM itself was written in the Pascal programming language with only small parts in assembly language. On the CAM side, ColorCAM was optimized for running the milling and drilling machines from LPKF Laser & Electronics AG for the production of PCB prototypes. Support and sales of ColorCAM were discontinued in 1993.
|
|
Atari ST Blitter chip 1987: The Atari Mega ST 2 ships with a blitter chip. Officially called the "Atari ST Bit-Block Transfer Processor", stylized as BLiTTER, it provides 16 options for merging source and destination data. The blitter is supported on most subsequent ST machines, including later revisions of the entry level STfm home computers. 1989: The short-lived Atari Transputer Workstation contains blitter hardware as part of its (Mega ST-based) "Blossom" video system.
|
|
Inmos T225 die The prototype 16-bit transputer was the S43, which lacked the scheduler and DMA-controlled block transfer on the links. At launch, the T212 and M212 (the latter with an on-board disk controller) were the 16-bit offerings. The T212 was available in 17.5 and 20 MHz processor clock speed ratings. The T212 was superseded by the T222, with on-chip RAM expanded from 2 KB to 4 KB, and, later, the T225.
|
|
In the 1980s, a tiny CPU that executed FORTH was fabricated into a DRAM chip to improve PUSH and POP. FORTH is a stack-oriented programming language and this improved its efficiency. The transputer also had large on chip memory given that it was made in the early 1980s making it essentially a processor-in-memory. Notable PIM projects include the Berkeley IRAM project (IRAM) at the University of California, BerkeleyIRAM project and the University of Notre Dame PIM effort.
|
|
Inmos T805 dieThe second-generation T800 transputer, introduced in 1987, had an extended instruction set. The most important addition was a 64-bit floating-point unit (FPU) and three added registers for floating point, implementing the IEEE754-1985 floating point standard. It also had 4 KB of on-board RAM and was available in 20 or 25 MHz versions. Breakpoint support was added in the later T801 and T805, the former featuring separate address and data buses to improve performance.
|
|
ParaCom thence took care of the sales and marketing side of the business. Parsytec/ParaCom's headquarters were maintained in Aachen (Germany), however they had subsidiary sales offices in Chemnitz (Germany), Southampton (United Kingdom), Chicago (USA), St Petersburg (Russia) and Moscow (Russia).Parsytec GmbH at new-npac.org In Japan, the machines were sold by Matsushita. Between 1988 and 1994, Parsytec built quite an impressive range of transputer based computers having its peak in the "Parsytec GC" (GigaCluster) which was available in versions using 64 up to 16384 transputers.
|
|
PARAVER has two components, a trace component and a visual component for analyze the traces, the statistics related to specific events, etc. PARAVER: A Tool to Visualize and Analyze Parallel Code by Vincent Pillet et al, Proceedings of the conference on Transputer and Occam Developments, 1995, pages 17–31 PARAVER may use trace formats from other systems, or perform its own tracing. It operates at the task level, thread level, and in a hybrid format. Traces often include so much information that they are often overwhelming.
|
|
Paul Balev was the architect at Roe/Eliseo who designed the new University now known as POSTECH. Four Korean architectural firms were engaged to develop the design and construction documents with the help of design criteria books produced by Roe/Eliseo. Construction work began on August 17, 1985. On May 4, 1986, British Prime Minister Margaret Thatcher visited POSTECH and donated an Inmos transputer, one of the leading edge computer parts at the time. The first matriculation ceremony was held on March 5, 1987.
|
|
This was too much for Inmos, which did not have the funding needed to continue development. By this time, the company had been sold to SGS-Thomson (now STMicroelectronics), whose focus was the embedded systems market, and eventually the T9000 project was abandoned. However, a comprehensively redesigned 32-bit transputer intended for embedded applications, the ST20 series, was later produced, using some technology developed for the T9000. The ST20 core was incorporated into chipsets for set-top box and Global Positioning System (GPS) applications.
|
|
Each i860 board (MK086 or MK096) contained two i860s with up to 32 MB of RAM each, and two T800s providing inter-processor communication. Sometimes known as the Concerto or simply the i860 Computing Surface, these systems had limited success. Meiko also produced a SPARC processor board, the MK083, which allowed the integration of the SunOS operating system into the Computing Surface architecture, similarly to the In- Sun Computing Surface. These were usually used as front-end host processors for transputer or i860 Computing Surfaces.
|
|
CSP was first described in a 1978 article by Tony Hoare, but has since evolved substantially. CSP has been practically applied in industry as a tool for specifying and verifying the concurrent aspects of a variety of different systems, such as the T9000 Transputer, as well as a secure ecommerce system. The theory of CSP itself is also still the subject of active research, including work to increase its range of practical applicability (e.g., increasing the scale of the systems that can be tractably analyzed).
|
|
IEEE 1355 achieves its design goals with relatively simple digital electronics and very little software. This simplicity is valued by many engineers and scientists. Paul Walker (see links ) said that when implemented in an FPGA, the standard takes about a third the hardware resources of a UART (a standard serial port), and gives one hundred times the data transmission capacity, while implementing a full switching network and being easier to program. Historically, IEEE 1355 derived from the asynchronous serial networks developed for the Transputer model T9000 on-chip serial data interfaces.
|
|
Inmos saw them being used for practically everything, from operating as the main CPU for a computer to acting as a channel controller for disk drives in the same machine. Spare cycles on any of these transputers could be used for other tasks, greatly increasing the overall performance of the machines. Even one transputer would have all the circuitry needed to work by itself, a feature more commonly associated with microcontrollers. The intent was to allow transputers to be connected together as easily as possible, with no need for a complex bus, or motherboard.
|
|
TV-toy was to be the basis for a video game console and was joint project between Inmos and Sinclair Research. The links in the T212 and T414/T424 transputers had hardware DMA engines so that transfers could happen in parallel with execution of other processes. A variant of the design, termed the T400, not to be confused with a later transputer of the same name, was designed where the CPU handled these transfers. This reduced the size of the device considerably since 4 link engines were approximately the same size as the whole CPU.
|
|
The transterpreter is computer software, an interpreter for the transputer, is a virtual machine for the programming language occam-π (occam-pi), and a portable runtime for the KRoC compiler. It is designed for education and research in concurrency and robotics. The transterpreter was developed at the University of Kent. The transterpeter has made it possible to easily run occam-π programs on platforms such as the Lego Mindstorms RCX, Arduino, IA-32, SPARC, MIPS, and the Cell BE, on the operating systems Linux, macOS, Windows, and DOS.
|
|
The Atari Panther is a cancelled 32-bit video game console from Atari Corporation that was going to be the successor to the Atari 7800 and the Atari XEGS. It was developed by the same ex-Sinclair team, Flare Technology, who were previously responsible for two cancelled console projects: the Flare One and the Konix Multisystem. The Panther was planned to be a combination of the Atari ST and the Atari Transputer Workstation Blossom video hardware. Work started in 1988 with a planned release in 1991 to directly compete with the Super Nintendo Entertainment System and the Sega Genesis.
|
|
Neural networks modeled after the activities of the central nervous system have allowed researchers to solve problems impossible to solve by other means. Artificial neural networks are now being applied in various applications to further research in other fields. One notable non- biological application of the tensor network theory was the simulated automated landing of a damaged F-15 fighter jet on one wing using a "Transputer parallel computer neural network". The fighter jet's sensors fed information into the flight computer which in turn transformed that information into commands to control the plane's wing-flaps and ailerons to achieve a stable touchdown.
|
|
The original transputer used a very simple and rather unusual architecture to achieve a high performance in a small area. It used microcode as the main method to control the data path, but unlike other designs of the time, many instructions took only one cycle to execute. Instruction opcodes were used as the entry points to the microcode read-only memory (ROM) and the outputs from the ROM were fed directly to the data path. For multi-cycle instructions, while the data path was performing the first cycle, the microcode decoded four possible options for the second cycle.
|
|
Sun Sparcstation as front end The x'plorer model came in two versions: The initial version was featuring 16 transputers, each having access to 4MB RAM and called just x'plorer. Later when Parsytec generally switched to the PPC architecture, it was called POWERx'plorer and featured 8 MPC 601 CPUs. Both models came in the same gorgeous desktop case (designed by Via 4 DesigniF Online Exhibition - Via 4 Design at ifdesign.de). In any model, the x'plorer was more or less a single "slice" — Parsytec called them cluster (picture) — of a GigaCube (PPC or Transputer), which used 4 of those clusters in its smallest version (GC-1).
|
|
In 1965 Barron left Elliott Automation to become Founder and Managing Director of Computer Technology Limited, where the Modular One range of computer systems was developed. In the mid-1970s he formed a new company, Microcomputer Analysis Ltd, which offered consultancy on microprocessors to the semiconductor industry. This brought him into contact with two eminent American semiconductor specialists, Richard Petritz and Paul Schroeder, and in 1978 the triumvirate founded Inmos International PLC, which produced the innovative transputer, and led to the development of SpaceWire. Barron was elected a Distinguished Fellow of the British Computer Society (DFBCS) in 1986 and was appointed CBE in the 1994 New Year Honours.
|
|
The combination of superscalar processing and speculative execution delivered a tangible performance increase on existing bodies of code – which were mostly written in Pascal, Fortran, C and C++. Given these substantial and regular performance improvements to existing code there was little incentive to rewrite software in languages or coding styles which expose more task-level parallelism. Nevertheless, the model of cooperating concurrent processors can still be found in cluster computing systems that dominate supercomputer design in the 21st century. Unlike the transputer architecture, the processing units in these systems typically use superscalar CPUs with access to substantial amounts of memory and disk storage, running conventional operating systems and network interfaces.
|
|
The decision as to which of these options would actually be used could be made near the end of the first cycle. This allowed for very fast operation while keeping the architecture generic.Stakem, Patrick H. The Hardware and Software Architecture of the Transputer, 2011, PRB Publishing, ASIN B004OYTS1K The clock rate of 20 MHz was quite high for the era and the designers were very concerned about the practicality of distributing such a fast clock signal on a board. A slower external clock of 5 MHz was used, and this was multiplied up to the needed internal frequency using a phase-locked loop (PLL).
|
|
The basic design of the transputer included serial links that allowed it to communicate with up to four other transputers, each at 5, 10, or 20 Mbit/s - which was very fast for the 1980s. Any number of transputers could be connected together over links (which could run tens of metres) to form one computing farm. A hypothetical desktop machine might have two of the "low end" transputers handling input/output (I/O) tasks on some of their serial lines (hooked up to appropriate hardware) while they talked to one of their larger cousins acting as a CPU on another. This serial link is called an os-link.
|
|
In the early 1980s, Tim King joined MetaComCo from the University of Bath, bringing with him some rights to an operating system called TRIPOS. MetaComCo secured a contract from Commodore to work on AmigaOS, with the AmigaDOS component being derived from TRIPOS. In 1986, King left MetaComCo to found Perihelion Software, and began development of a parallel operating system, initially targeted at the INMOS Transputer series of processors. Helios extended TRIPOS' use of a light-weight message passing architecture to networked parallel machines. Helios 1.0 was the first commercial release in the summer of 1988, followed by version 1.1 in autumn 1989, 1.1a in early 1990, 1.2 in December 1990 followed by 1.2.
|
|
The first known software for VJs was Vujak - created in 1992 and written for the Mac by artist Brian Kane for use by the video art group he was part of - Emergency Broadcast Network, though it was not used in live performances. EBN used the EBN VideoSampler v2.3, developed by Mark Marinello and Greg Deocampo. In the UK, Bristol's Children of Technology developed a dedicated immersive video lightshow using the Virtual Light Machine (VLM) called AVLS or Audio-Visual-Live-System during 1992 and 1993. The VLM was a custom built PC by video engineer Dave Japp using super- rare transputer chips and modified motherboards, programmed by Jeff Minter (Llamasoft & Virtual Light Co.).
|
|
A side effect of most multitasking design is that it often also allows the processes to be run on physically different CPUs, in which case it is termed multiprocessing. A low-cost CPU built for multiprocessing could allow the speed of a machine to be raised by adding more CPUs, potentially far more cheaply than by using one faster CPU design. The first transputer designs were due to computer scientist David May and telecommunications consultant Robert Milne. In 1990, May received an Honorary DSc from University of Southampton, followed in 1991 by his election as a Fellow of The Royal Society and the award of the Patterson Medal of the Institute of Physics in 1992.
|
|
This contrasts with the adapted reference design strategy used by Eyetech for the original AmigaOne series. Even before the 'wish list' was completed, hardware design company Varisys had been chosen as a partner based on their track record both with the PowerPC architecture and with parallel computing. The decision to form a partnership with Varisys had the consequence of bringing XMOS chips to the AmigaOne X1000, as it is the connection between XMOS and the Varisys team, dating back to earlier work on the Inmos Transputer, that led to the suggestion of including an XMOS XCore chip on the X1000 motherboard. This XCore chip is referred to by A-Eon as the 'Xena' Coprocessor.
|
|
An early and important application of CSP was its use for specification and verification of elements of the INMOS T9000 Transputer, a complex superscalar pipelined processor designed to support large-scale multiprocessing. CSP was employed in verifying the correctness of both the processor pipeline and the Virtual Channel Processor, which managed off-chip communications for the processor. Industrial application of CSP to software design has usually focused on dependable and safety-critical systems. For example, the Bremen Institute for Safe Systems and Daimler-Benz Aerospace modeled a fault-management system and avionics interface (consisting of about 23,000 lines of code) intended for use on the International Space Station in CSP, and analyzed the model to confirm that their design was free of deadlock and livelock.
|
|
It is the year 2040, all environmental disasters and the economic Resource Wars of the early twenty-first century have had catastrophic effects upon the Earth's ecological balance. Ever-increasing polarisation of wealth, along with the development of humanoid, robotic "biots" (Biological Optical Transputer Systems), have resulted in a social demographic that leaves the majority of the world's population scavenging in the undercity slums while a wealthy minority live luxurious lives in towering skyscrapers. The Earth's population continues to rise, but without the resources to support them or the jobs to sustain them, they are cast onto the streets of the over-urbanised mega- cities. The megalopolis of Metropia, a reformed and renamed New York City, is the world's most powerful city-state and within it are the headquarters of the world's most powerful corporation, Maximum Inc.
|
|
The processors in a CS-2 were connected by a Meiko-designed multi-stage packet- switched "fat tree" network implemented in custom silicon.Meiko CS-2 Interconnect Elan-Elite design Jon Beecroft, Fred Homewood, Moray McLaren; Journal Parallel Computing; Volume 20 Issue 10-11, November 1994Meiko CS-2 Interconnect Elan-Elite design Fred Homewood, Moray McLaren; Hot Interconnects Conference, Stanford; August 1993Message Passing Performance Jack Dongarra and Tom Dunigan; Concurrancy: Practice and Experience; October 1997 This project, codenamed Elan-Elite, was started in 1990, as a speculative project to compete with the T9000 Transputer from Inmos, which Meiko intended to use as an interconnect technology. The T9000 began to suffer massive delays, such that the internal project became the only viable interconnect choice for the CS-2. This interconnect comprised two devices, code-named Elan (adapter) and Elite (switch).
|
|
Current academics at the University of Bristol include 21 fellows of the Academy of Medical Sciences, 13 fellows of the British Academy, 13 fellows of the Royal Academy of Engineering and 44 fellows of the Royal Society. These include, Sir Michael Berry, one of the discoverers of quantum mechanics' "geometric phase", John Rarity international expert on quantum optics, quantum cryptography and quantum communication, David May, computer scientist and lead architect for the transputer, Mark Horton, a British maritime and historical archaeologist and Bruce Hood, a world-leading experimental psychologist. Academics in computer science include, David Cliff, inventor of the seminal "ZIP" trading algorithm, Peter Flach, Mike Fraser, Professor of Human-computer interaction, Julian Gough and Nigel Smart. Past academics of the university include, Patricia Broadfoot, Vice-Chancellor of the University of Gloucestershire, Nigel Thrift, Vice-Chancellor of the University of Warwick, and Wendy Larner, Provost of Victoria University of Wellington.
|
|
The German company Jäger Messtechnik used transputers for their early ADwin real-time data acquisition and control products. Transputers also found use in protocol analysers such as the Siemens/Tektronix K1103 and in military applications where the array architecture suited applications such as radar and the serial links (that were high speed in the 1980s) served well to save cost and weight in sub-system communications. The transputer also appeared in products related to virtual reality such as the ProVision 100 system made by Division Limited of Bristol, featuring a combination of Intel i860, 80486/33 and Toshiba HSP processors, together with T805 or T425 transputers, implementing a rendering engine that could then be accessed as a server by PC, Sun SPARCstation or VAX systems. Myriade, a European miniaturized satellite platform developed by Astrium Satellites and CNES and used by satellites such as the Picard, is based on the T805 yielding around 4 MIPS and is scheduled to stay in production until about 2015.
|
|
Gresham-CAP offered a novel distributed processing system based on commercial off-the-shelf components and utilising a modular software architecture largely written in the Ada programming language. The Gresham-CAP consortium won the bid, and their solution, known as Submarine Command System (SMCS) became the basis for subsequent products from the company. The choice of Intel 80386 processors and MultiBus, when many competing chips were available and the PC had only recently reached the market, showed foresight as the basic architecture remains in service today on RN submarines. (The choice of an array of INMOS Transputer chips to process sonar tracking data was less successful - whilst they did the job, the lack of long term support / future product line meant they have been phased out once general purpose processors were able to fulfill the role.) The impact of this still-young company displacing one of the great names of British electronics in the Royal Navy shocked the industry and can be seen as one of the first open competitions in modern British defence procurement and followed a long post-war period of 'preferred contractor' policies.
|
|